A data latch stores one input bit when an enable signal permits it and otherwise preserves the previous value.

Conceptually:

enable = 1  → output follows data
enable = 0  → output holds previous value

Gated storage

Logic around a basic latch can convert a single data input into the appropriate set/reset actions only while storage is enabled.

This makes the interface safer than exposing set and reset independently.

Level-sensitive behaviour

A latch is level-sensitive: during the entire time that enable is active, changes in the data input can propagate into the stored output.

Race conditions

If several state changes can propagate through feedback during the same active interval, the final result may depend on gate delays. This timing dependence is a race condition.

Synchronous digital systems reduce this problem by restricting state changes to controlled clock events rather than leaving storage transparent for an extended interval.