Dynamic RAM (DRAM) stores each data bit using a tiny amount of electrical charge. The charge leaks over time, so the stored information must be restored periodically.

A compact memory cell

A DRAM cell uses a capacitor as the storage element and a transistor to connect it to shared circuitry when the cell is accessed. Charge and absence of charge represent the two logical states.

This design is compact, allowing many bits to fit on one chip.

Rows and columns

Cells are arranged in large arrays. Memory operations activate a row and use sense amplifiers to detect and restore the small stored charges before selecting the desired columns.

Refresh

Because capacitor charge leaks, the memory controller periodically revisits rows and refreshes their contents even when software has not requested them.

DRAM is therefore dynamic: retaining data requires continuing electrical activity. It is also volatile, so its contents disappear when power is removed.

The density advantage of DRAM makes it suitable for large main memories even though caches use faster storage technologies closer to the processor.