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Atomic operations and hardware synchronization

A synchronization algorithm sometimes needs one memory operation to be indivisible with respect to other processors. Hardware provides atomic operations for this purpose.

Read-modify-write

Operations such as compare-and-swap or atomic exchange can read a memory location, decide from its old value and update it as one atomic action.

They can implement the small state transition at the core of locks and other synchronization primitives.

Why ordinary loads and stores are not enough

A source expression such as

counter = counter + 1

normally expands into several operations. Another thread can observe or modify the value between them.

Algorithms that attempt mutual exclusion with only ordinary shared variables can also depend on assumptions about operation ordering that compilers and modern processors are not required to preserve.

Memory ordering

Atomicity and ordering are related but distinct. Memory models specify which reorderings concurrent code may observe; fences and ordered atomic operations constrain those reorderings when an algorithm requires them.

Hardware synchronization therefore supplies primitives from which higher-level mutexes, semaphores and lock-free structures can be built.